发明名称 CIRCUIT AND METHOD FOR REDUCING NOISE
摘要 <p>In a noise reduction circuit, a transistor circuit (21) receives power supply from a direct current voltage source (Vcc) through a power supply line circuit (24), and outputs an output signal by amplifying an input signal. An offset signal adding circuit (25) obtains and attenuates a part of the output signal, generates an offset signal, which has substantially the reverse phase and the same amplitude compared with those of a leak signal leaked to the power supply line circuit (24), and substantially offsets the leak signal by adding the offset signal to the leak signal.</p>
申请公布号 WO2007114126(A1) 申请公布日期 2007.10.11
申请号 WO2007JP56545 申请日期 2007.03.28
申请人 JP 发明人 KOMATSU, NAOKI;IWAKI, HIDEKI;YAMADA, TORU
分类号 H03F1/26 主分类号 H03F1/26
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