发明名称 |
SYSTEM AND METHOD FOR VOLTAGE NOISE AND JITTER MEASUREMENT USING TIME-RESOLVED EMISSION |
摘要 |
Time-resolved emission can be used to measure loop-synchronous, small-signal voltage perturbation in integrated circuits. In this technique the measurements are completely non-invasive and so reflect the true device behavior. The time-dependant propagation delay caused by Vdd modulation also shows the expected qualitative signature. This technique should find applications in circuits with relatively fast clock-like circuits where loop-synchronous voltage pickup is limiting circuit behavior.
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申请公布号 |
US2007236206(A1) |
申请公布日期 |
2007.10.11 |
申请号 |
US20070697205 |
申请日期 |
2007.04.05 |
申请人 |
CREDENCE SYSTEMS CORPORATION |
发明人 |
KASAPI STEVEN;WOODS GARY LEONARD |
分类号 |
G01R23/16 |
主分类号 |
G01R23/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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