发明名称 Gehäuse für eine integrierte Schaltung und Verfahren zu dessen Herstellung
摘要 An integrated circuit package which contains an integrated circuit. The internal integrated circuit is coupled to external lands located on a first outer surface of the package by a plurality of vias. The vias extend through the package from the first outer surface to an opposite second outer surface. The package has a plurality of devices such as capacitors that are mounted to the second outer surface. Some of the vias are connected to a whole group of external lands. Grouping the lands to a single via reduces the number of vias on the second surface of the package. The reduction in vias allows additional capacitors to be mounted to the second surface of the package.
申请公布号 DE19781978(B4) 申请公布日期 2007.10.11
申请号 DE1997181978 申请日期 1997.07.09
申请人 INTEL CORPORATION 发明人 BANERJEE, KOUSHIK;CHRONEOS, ROBERT J.;MOZDZEN, TOM
分类号 H01L23/50;H01L21/48;H01L23/043;H01L23/057;H01L23/24;H01L23/34;H01L23/64 主分类号 H01L23/50
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