发明名称 |
MEMORY MANAGEMENT FOR HIGH SPEED MEDIA ACCESS CONTROL |
摘要 |
Aspects disclosed herein address the need in the art for memory management for high speed media access control. A packet buffer may store packets with a first data structure, comprising the packet length, sequence number, and a pointer to a second data structure. Packet data may be stored in a linked list of one or more second data structures. Transmit and receive queues may be formed using linked lists or arrays of the first data structures. Memory locations for storing first and second data structures may be kept in lists indicating free locations for the respective data structure types. A flexible memory architecture is disclosed in which two configurations may be selected. In a first configuration, a first memory comprises per-flow parameters for multiple flows, and a second memory comprises a packet buffer. In a second configuration, the first memory comprises per-flow pointers to per-flow parameters in the second memory. The packet buffer resides in a third memory. Various other aspects are also presented. |
申请公布号 |
WO2007115199(A2) |
申请公布日期 |
2007.10.11 |
申请号 |
WO2007US65678 |
申请日期 |
2007.03.30 |
申请人 |
QUALCOMM INCORPORATED;DRAVIDA, SUBRAHMANYAM;NARAYAN, SRIRAM |
发明人 |
DRAVIDA, SUBRAHMANYAM;NARAYAN, SRIRAM |
分类号 |
H04L12/56 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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