发明名称 PHASE LOCKED OSCILLATOR
摘要 <p>There is provided an analog phase locked oscillator comprising a sampling phase detector (2), a loop filter (3), a voltage controlled oscillator (4), a frequency multiplier (7) and a feedback loop (9) where the feedback loop (9) connects the output of said oscillator (4) with the input of said phase detector (2) through said frequency multiplier (7). The sampling phase detector (2) is adapted to perform a discrete phase comparison between a reference frequency (1) and the multiplied feedback signal. The voltage controlled oscillator (4) is adapted to give out a constant frequency at a multiply of the reference frequency (1) divided with the multiplication factor of the multiplier (7).</p>
申请公布号 WO2007114705(A1) 申请公布日期 2007.10.11
申请号 WO2007NO00066 申请日期 2007.02.21
申请人 NORSPACE AS;IMENES, BEN JARLE;ROOTH, STIG 发明人 IMENES, BEN JARLE;ROOTH, STIG
分类号 H03D3/00;H03L7/091 主分类号 H03D3/00
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