Semiconductor memory component, has substrate at main side, where lower bit lines are formed in substrate and arranged parallel to each other at distance, and word lines arranged over lower bit lines and transverse to lower bit lines

摘要

The component has a substrate at a main side, where lower bit lines (LBL1- LBL6) are formed in the substrate and are arranged parallel to each other at a distance. Word lines (WL1- WL10) are arranged over the lower bit lines parallel to each other at a distance and transverse to the lower bit lines. A gate-dielectric arranged between the word lines and cell bodies includes a memory layer as a memory medium. Lower source and/or drain regions are formed at lower lines of the bodies adjacent to the lower bit lines, and upper source and/or drain regions are formed in upper lines of the bodies. An independent claim is also included for a method for manufacturing semiconductor memory components.