| 摘要 |
PROBLEM TO BE SOLVED: To provide a latch circuit low in the generating rate of soft error and reduced in affection to circuit characteristics. SOLUTION: Two sets of latch circuits, constituted of inverters INV2, INV4 whose driving power is big and inverters INV1, INV3 whose driving power is small, are provided and the output nodes NB of the inverters whose driving force is big in two sets of the latch circuits are made common while the output nodes NA, NC of the inverters whose driving power is small are separated to suppress the change of potentials of the common output nodes NB by the other latch circuit upon the incidence of neutron radiation or the like into the latch circuit and permit the reduction of generating rate of soft error in the latch circuit while reducing the affection to the circuit characteristics. COPYRIGHT: (C)2008,JPO&INPIT
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