发明名称 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH POST-PASSIVATION INTERCONNECTION AND INTEGRATION
摘要 An integrated circuit package system is provided providing an integrated circuit die having a final metal layer of the semiconductor process used to manufacture the integrated circuit die and a passivation layer provided thereon, depositing a first metal layer on the passivation layer and the final metal layer, forming an analog circuit in the first metal layer, coating a first insulation layer on the first metal layer and the passivation layer, exposing a first pad and a second pad of the first metal layer through the first insulation layer, and connecting a first interconnect on the first pad and a second interconnect on the second pad.
申请公布号 US2007235878(A1) 申请公布日期 2007.10.11
申请号 US20060278002 申请日期 2006.03.30
申请人 STATS CHIPPAC LTD. 发明人 LIN YAOJIAN;MARIMUTHU PANDI C.
分类号 H01L23/48 主分类号 H01L23/48
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