| 摘要 |
A semiconductor package comprises substrate (10), semiconductor chips (11, 12), and transparent resin layer (14). The substrate has mounting and back surfaces, and electrode patterns (15, 18). The back surface faces opposite to each other. The electrode patterns are formed both on the two surfaces. The semiconductor chips are wire-bonded on mounting surface. The resin layer seals the mounting surface. The electrode patterns on back surface include lead-in wires for electrolytic plating. No lead-in wires are present on mounting surface. The substrate is provided with passages. A semiconductor package comprises substrate, semiconductor chips, and transparent resin layer. The substrate has mounting and back surfaces, electrode patterns. The back surface faces opposite to each other. The electrode patterns are formed both on the two surfaces. The semiconductor chips are wire-bonded on mounting surface. The resin layer seals the mounting surface. The electrode patterns on back surface include lead-in wires for electrolytic plating. No lead-in wires are present on mounting surface. The substrate is provided with passages through which the electrode patterns on mounting surface and back surface are electrically connected. The electrode patterns on each of the mounting surface and the back surface have a metal film formed by an electrolytic plating process. Each of lead-in wire has an externally exposed end part. An independent claim is also included for producing semiconductor packages for surface mounting. |
