发明名称 Clock generation circuit
摘要 <p>In a second system that generates a clock signal that is synchronized with a first system, a control voltage value that controls the second oscillator such that the second system is synchronized with the first system is monitored according to the phase difference between a reference signal that is generated using the output of a first oscillator in the first system and the output of a second oscillator, whereby frequency fluctuation that occurs due to age deterioration of the first oscillator is detected.</p>
申请公布号 EP1843235(A2) 申请公布日期 2007.10.10
申请号 EP20070102494 申请日期 2007.02.15
申请人 NEC CORPORATION 发明人 KUWAJIMA, NAOKI
分类号 G06F1/04 主分类号 G06F1/04
代理机构 代理人
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