Single-loop switched-capacitor analog-to-digital sigma-delta converter

摘要

A single-loop differential switched-capacitor sigma-delta converter has a three stage double-sampling architecture with reduced current consumption. The converter is stable for large input dynamics, which makes it suitable for RF applications. The three-stage multi-bit double-sampled architecture has a single-loop architecture in which all integrators are included in a same feedback loop. This has been made possible based upon the type of integrators that are connected in cascade. Functioning of the converter is less sensitive to nonlinearities of the operational amplifiers of the integrators.