发明名称 Digital frequency locked loop and phase locked loop frequency synthesizer
摘要 A frequency synthesizer including frequency and phase locked loop that operates in either a frequency locked loop (FLL) mode or a phase locked loop (PLL) mode. In a first state, the frequency and phase locked loop operates in the FLL mode for initial frequency acquisition. Once the frequency and phase locked loop has locked in FLL mode, the frequency and phase locked loop transitions to the PLL mode for normal operation.
申请公布号 US7279988(B1) 申请公布日期 2007.10.09
申请号 US20050082277 申请日期 2005.03.17
申请人 RF MICRO DEVICES, INC. 发明人 JANESCH STEPHEN T.;KING ERIC J.
分类号 H03L7/00 主分类号 H03L7/00
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