发明名称 METHOD FOR FORMING INTER METAL DIELECTRIC LAYER IN SEMICONDUCTOR DEVICE
摘要 A method for forming an interlayer dielectric of a semiconductor device is provided to simplify interlayer dielectric forming processes by trapping F radicals generated from an FSG(Fluorine Silicate Glass) using a USG(Undoped Silicate Glass) layer obtained from in-situ process. A metal line layer for being electrically connected with a contactor is formed on an interlayer dielectric(S200). A USG liner layer is deposited on the metal line layer(S202). An FSG layer is deposited on the USG liner layer by a first in-situ process(S204). A USG capping layer is formed on the FSG layer by a second in-situ process(S206). A planarization process is performed on the resultant structure(S208).
申请公布号 KR100763694(B1) 申请公布日期 2007.10.04
申请号 KR20060083399 申请日期 2006.08.31
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 YU, BYEONG HAK
分类号 H01L21/205 主分类号 H01L21/205
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