发明名称 TERNARY DETECTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a ternary detection circuit capable of achieving precise ternary level detection relating to an input signal by a low power supply voltage configuration, capable of suppressing power consumption by reducing the whole circuit scale, and capable of easily responding to a mobile device which is advanced in miniaturization by low power consumption. SOLUTION: Circuit formation is made to be enabled by a CMOS process. Ternary level detection can be enabled by a state of output signals from output terminals 4, 5 relating to an input signal to an input terminal 3 even reducing the whole circuit area by miniaturizing each of transistor elements configuring the circuit, and even by a low power supply voltage by further reducing power consumption to be needed for a circuit operation. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007259160(A) 申请公布日期 2007.10.04
申请号 JP20060081825 申请日期 2006.03.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KURASHINA KENICHI
分类号 H03K19/20;H03K19/0175 主分类号 H03K19/20
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