发明名称 REFERENCE POTENTIAL GENERATING CIRCUIT, AND SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH THE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a reference potential generating circuit in which reduction in a DC current and generation of stable output reference potential are achieved. SOLUTION: The reference potential generating circuit has: a current mirror type amplifier (CM11) having an input reference potential and a feedback level inputted thereto; an output transistor (QP11) having an output of the current mirror type amplifier inputted thereto and an output reference potential outputted thereto; a monitor part (R11 and R12) generating a feedback level from the output of the output transistor; a first switch (QN11) controlling supply of a power source potential (VSS) for the current mirror type amplifier; a second switch (QN12) controlling supply of the power source potential for the monitor part; and an output switch (TSW12) controlling connection to the next stage of the output of the output transistor. The first and the second switches, and the output switch are turned off simultaneously, and after turning off, the first and the second switches are turned on at an elapse of a first prescribed time, and after turning on, the output switch is turned on at an elapse of a second prescribed time. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007257702(A) 申请公布日期 2007.10.04
申请号 JP20060078287 申请日期 2006.03.22
申请人 ELPIDA MEMORY INC 发明人 MATSUBARA YASUSHI
分类号 G11C11/4074;G11C11/403 主分类号 G11C11/4074
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