| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a wire bonding optimization method and a semiconductor device wherein, when a displacement arises in packaging position of a chip to a package, short circuit is avoided between bonding wires. <P>SOLUTION: The wire bonding optimization method comprises a first process S1 of inputting into a wire bonding apparatus instance names, coordinates, and connection information of a plurality of bonding points, and pad coordinates of a semiconductor chip such that the plurality of the bonding points are set with respect to any pad on the side of the semiconductor chip in wire bonding of connecting the pad 2 of the semiconductor chip 1 and a bonding point BP on a package substrate; a second process S2 of detecting an amount of position displacement with respect to the package substrate of the semiconductor chip; a third process S3 of detecting an optimum bonding point from among the plurality of the bonding points, on the basis of the amount of the detected position displacement; and a fourth process S4 of transmitting the instance information of the optimum bonding point to the wire bonding apparatus. <P>COPYRIGHT: (C)2008,JPO&INPIT |
