摘要 |
<p>Methods and apparatus adapted for enhancing the throughput of a digital processor (e.g., microprocessor, CISC device, or RISC device) through use of a direct memory access (DMA) mechanism. In one embodiment, the processor comprises a "soft" RISC-based processor core that is both user-extensible and user-configurable. The core comprises a functional process or unit (DMA assist) that is coupled to the processor's extension logic and which facilitates throughput by, among other things, ensuring that the CPU and processor extension logic can operate on data in parallel in an efficient manner. In one variant, a parallel datapath (including a buffer) is used in conjunction with the aforementioned DMA assist so as to permit the processor extension logic to efficiently operate in parallel with the CPU.</p> |
申请人 |
ARC INTERNATIONAL;ARISTODEMOU, ARIS;COHEN, AMNON, BARON;WONG, KAR-LIK;LIM, RYAN, S.C.;JONES, SIMON |
发明人 |
ARISTODEMOU, ARIS;COHEN, AMNON, BARON;WONG, KAR-LIK;LIM, RYAN, S.C.;JONES, SIMON |