GENERATING DEVICE, GENERATING METHOD, PROGRAM AND RECORDING MEDIUM

摘要

A generating device is provided to generate such a set of test vectors as reduces a difference between logic values that occurs before and after scan capture with respect to an output of a scan cell included in a full scan sequence circuit. A generating device (200) generates a set of initial test vectors (216) for a logic circuit. The generating device (200) is comprised of a subject test vector specifying unit (204) for specifying test vectors to be selected which satisfy a prescribed standard for the number of bits (the number of transit bits) among each test vector of the set of the initial test vectors (216) where a difference between logic values occurs before and after scan capture with respect to an output of a scan cell included in the sequence circuit, and a test vector set converter (206) for converting an output of a scan cell included in the sequence circuit so as to reduce the number of transit bits with respect to a test vector to be selected and specified by the subject test vector specifying unit (204).