DATA RECEIVER AND SEMICONDUCTOR INTEGRATED CIRCUIT HAVING THAT DATA RECEIVER

摘要

A data receiver comprises an amplifying circuit (41) that amplifies a received duo-binary data with a predetermined gain for output; an offset canceling part (56,57) that cancels the offset of an output signal of the amplifying circuit (41); and a data determining part (43,44) that samples, based on a first reference voltage and a second reference voltage lower in level than the first reference voltage, the output signal of the amplifying circuit (41), thereby determining which one of the three values constituting the duo-binary data the received duo-binary data exhibits.