| 摘要 |
PROBLEM TO BE SOLVED: To provide a processor achieving improvement of a processing speed and facilitation of cause analysis in the case of inconsistency of memory areas, with a simple circuit configuration. SOLUTION: This processor 100 performs accordance decision of an address decided in a break point of a CPU core 101 and an address of a data cache 102 accessed by the CPU core 101 by a comparator 104. The data cache 102 outputs a cache hit signal showing a detection result of a cache hit/error by the access. An AND circuit 106 outputs a data break signal to the CPU core 101 on the basis of the cache hit signal of the data cache 102 to make the CPU core 101 execute a break. COPYRIGHT: (C)2008,JPO&INPIT
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