SEMICONDUCTOR MEMORY DEVICE

摘要

A semiconductor memory 10 includes a memory control section 13 and a memory core section 11. A command judgment circuit 132 in the memory control section 13 changes the operating mode of the semiconductor memory 10 in response to a command sent from a controller of an information processing apparatus. In a first mode, a decryption process is performed in a command decryption circuit 131, and data outputted from the memory core section 11 is not scrambled. In a second mode, the decryption process is not performed in the command decryption circuit 131, and the command outputted from the memory core section 11 is scrambled.