发明名称 Integrated circuit which disables writing circuitry to memory when the power drops below a power threshold predetermined and controlled by the processor
摘要 An integrated circuit comprising a processor, a memory that the processor can access, a memory access unit for controlling accesses to the memory, an input for receiving power for the integrated circuit from an external power source, and a power detection unit, the power detection unit being configured to: monitor a quality of power supplied to the input; and in the event the quality of the power drops below a predetermined threshold, disabling a power supply to circuitry for use in writing to the memory, such that the memory access unit's ability to alter data in the memory is disabled prior to address or data values to be written to the memory becoming unreliable due to failing power.
申请公布号 US7278034(B2) 申请公布日期 2007.10.02
申请号 US20030727238 申请日期 2003.12.02
申请人 SILVERBROOK RESEARCH PTY LTD 发明人 SHIPTON GARY
分类号 G06F1/00;B41J2/05;G06F21/00;H04L9/00;H04N1/405 主分类号 G06F1/00
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