| 摘要 |
A capacitance-compensated differential circuit line layout structure is proposed, which is designed for use on a circuit board, such as a high-speed digital circuit board, for the layout of a pair of differential circuit lines on the high-speed digital circuit board, and which is characterized by the provision of a branched electrically-conductive pad at the bent portion of the radially-side one of the two differential circuit lines (i.e., the shorter one of the two circuit lines), for the purpose of providing the shorter one of the circuit lines with a capacitive effect that can cause a time delay to the ultra-high frequency digital signal passing therethrough, thereby eliminating the undesired effects of phase skew and signal reflection. In addition, this feature also allows the layout work of the differential pair of circuit lines to be more simplified and thus easier to implement than the prior art.
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