发明名称 PROGRAMMABLE LOGIC DEVICE
摘要 PROBLEM TO BE SOLVED: To solve the problem of an LSI mounted with a reconfigurable core that cannot sufficiently utilize a feature of the reconfigurable core being a switchable function and is inferior to prior arts using a hard block in terms of the cost performance. SOLUTION: In order to utilize the feature of the switchable function of the reconfigurable core, it is required to realize reading of configuration data from the outside of the LSI to the inside of the LSI in a proper timing at a high speed. An exclusive bus is provided between a memory outside the LSI for storing the configuration data and a memory for storing the configuration data inside the LSI. Otherwise, a clock domain and a power supply domain independently of another block are established for a block associated with the transfer of the configuration data inside the LSI. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007251329(A) 申请公布日期 2007.09.27
申请号 JP20060068800 申请日期 2006.03.14
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MARUI SHINICHI
分类号 H03K19/173;H01L21/82;H01L21/822;H01L27/04 主分类号 H03K19/173
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