发明名称 Error Reduction in a Digital-to-Analog (Dac) Converter
摘要 In a method to improve error reduction in a digital-to-analog converter (DAC), comprising a mapping matrix block and a plurality of selectable source units which supply signals that in combination provide for analog output signals, mapping input signals, obtained from digital input signals to be converted into the analog output signals, are supplied to the mapping matrix block. In the mapping matrix block mapping output signals are generated in response to said mapping input signals and to mapping control signals derived from errors occurring in the plurality of selectable source units. At least one of the mapping input signals is applied for the substantially simultaneous generation of the mapping output signals for a number of source units.
申请公布号 US2007222653(A1) 申请公布日期 2007.09.27
申请号 US20050587105 申请日期 2005.04.11
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 BRIAIRE JOSEPH
分类号 H03M1/06;H03M1/74 主分类号 H03M1/06
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