发明名称 |
Integrated Circuit And Method For Buffering To Optimize Burst Length In Networks On Chips |
摘要 |
An integrated circuit comprising a plurality of processing modules (M, S) coupled by an interconnect means (N) is provided. A first processing module (M) communicates with a second processing module (S) based on transactions. A first wrapper means (WM 1 ) associated to said second processing module (S) buffers data from said second processing module (S) to be transferred over said interconnect means until a first amount of data is buffered and then transfers said first amount of buffered data to said first processing module (M).
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申请公布号 |
US2007226407(A1) |
申请公布日期 |
2007.09.27 |
申请号 |
US20050569083 |
申请日期 |
2005.05.13 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS, N.V. |
发明人 |
RADULESCU ANDREI;GOOSSENS KEES GERARD W. |
分类号 |
G06F13/42 |
主分类号 |
G06F13/42 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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