| 摘要 |
FIELD: radio engineering and communications for usage as output device for amplification of analog signals power (buffer amplifier). ^ SUBSTANCE: output cascade (dwg. 2) contains first n-p-n (1) and second p-n-p (2) input transistors with combined bases, while emitter of first input n-p-n (1) transistor is connected to collector output of first current mirror (3) and to base of first output p-n-p transistor (4), emitter of second input p-n-p transistor (2) is connected to collector output of second current mirror (5) and to base of second output n-p-n transistor (6), and emitters of first (4) and second (6) output transistors are connected to load (7). Additionally introduced are first p-n-p (8) and second n-p-n (9) auxiliary transistors, while emitter of first auxiliary p-n-p transistor (8) is connected to additional support current supply (11), its base is connected to emitter of second (2) input p-n-p transistor, and collector - to input of first current mirror (3), emitter of first auxiliary n-p-n transistor (9) is connected to second correcting capacitor (12) and to second additional support current supply (13), and collector is connected to input of first current mirror (5). ^ EFFECT: increased speed of operation. ^ 2 cl, 7 dwg |
