发明名称 FILTER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a filter circuit capable of reducing activation time at power-on. SOLUTION: At power-on, respective switches SW1, SW2 are turned off and a capacitor Cfc is cut off from an operational amplifier AMP, thus starting up the voltage of an output terminal OUT sharply, and reducing activation time at power-on. Then, when the voltage of the output terminal OUT becomes stable completely, respective transistors SW1, SW2 are turned on. The filter circuit 10 composes an incomplete integral circuit in which a resistor Rfc is connected in parallel with the capacitor Cfc, thus securing filter characteristics regulated by the capacitor Cfc and respective resistors Ra, Rfc. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007251460(A) 申请公布日期 2007.09.27
申请号 JP20060070241 申请日期 2006.03.15
申请人 DENSO CORP 发明人 KITAO NORIO;HAYAKAWA JUNJI
分类号 H03H11/04 主分类号 H03H11/04
代理机构 代理人
主权项
地址