| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which timing of a signal activating a sense amplifier is optimized and high speed operation can be performed with wide range power source potentials. <P>SOLUTION: The semiconductor memory device is provided with: a memory cell array 11 in which a plurality of static type memory cells constituted of MIS transistors are arranged; a sense amplifier circuit 15 amplifying data transferred to a bit line; a first dummy cell group DCN including a plurality of dummy cells which is constituted of MIS transistors and in which data is fixed; a dummy word line selecting the first dummy cell group DCN; a dummy bit line to which data of the first dummy cell group is transferred; a signal generating circuit 18 generating an activating signal activating the sense amplifier circuit 15; and a potential generating circuit 19 generating a source potential supplied to the first dummy cell group DCN; wherein the source potential is different from a power source potential. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
