发明名称 Validating Apparatus For Use With A Pair Of Integrated Circuits
摘要 An apparatus is provided for validating a device. The apparatus includes a first integrated circuit which is configured to generate a random number, reference information using the random number and a secret key. A control system is configured to: receive the random number and the reference information from the first integrated circuit, receive validation information from a second integrated circuit positioned on the device whereby the validation information is generated by the second integrated circuit using the random number and the secret key, and compare the reference and validation information received from the integrated circuits to validate the device.
申请公布号 US2007226498(A1) 申请公布日期 2007.09.27
申请号 US20070757385 申请日期 2007.06.03
申请人 SILVERBROOK RESEARCH PTY LTD 发明人 WALMSLEY SIMON R.;LAPSTUN PAUL
分类号 H04L9/00;B41J2/165;B41J2/175;B41J3/42;B41J3/44;B41J11/70;B41J15/04;H04N1/21;H04N5/225;H04N5/262 主分类号 H04L9/00
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