发明名称 |
Technique for executing selected instructions in order |
摘要 |
A technique for coordinating execution of instructions in a processor that allows instructions to execute out-of-order includes decoding a particular instruction that is defined in accordance with an instruction set of the processor. A helper sequence of instructions that corresponds to the particular instruction is then introduced into a stream of executable operations. The corresponding helper sequence includes a first artificial dependency instruction that codes a dependency on a register that is not actually employed as a register source or target for an operation performed by the particular instruction. |
申请公布号 |
US2007226465(A1) |
申请公布日期 |
2007.09.27 |
申请号 |
US20060371143 |
申请日期 |
2006.03.08 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
CHAUDHRY SHAILENDER;CAPRIOLI PAUL;YIP SHERMAN H. |
分类号 |
G06F9/40 |
主分类号 |
G06F9/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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