发明名称 Cache memory and processor and their production methods
摘要 <p>A cache memory (50) built in a processor (10) comprising a plurality of independent memory blocks (53b), pass/fail information memory unit (56a) memorizing a presence/absence of a failure occurring in each of the memory blocks (53b), and a screening control function (54) substituting a sound memory block for a failedmemory block based on a memory content in the pass/fail information memory unit (56a). </p>
申请公布号 EP1622167(A3) 申请公布日期 2007.09.26
申请号 EP20040257448 申请日期 2004.11.30
申请人 FUJITSU LIMITED 发明人 TONOSAKI, MIE;SAKURAI, HITOSHI
分类号 G11C29/00 主分类号 G11C29/00
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