发明名称 INFORMATION PROCESSOR
摘要 <p><P>PROBLEM TO BE SOLVED: To enable an SMP (symmetric multiprocessor)system including a perfect mesh type node-to-node connection constituted by a passive backplane to use a network which is unused in a configuration of less than a maximum node number without making a change to the passive backplane. <P>SOLUTION: In the information processor to be operated as a symmetric multiprocessor system with a predetermined number of nodes mounted on a backplane, in which wires for mutually connecting the predetermined number of nodes in a perfect mesh topology are arranged on the backplane, when the processor is operated as the symmetric multiprocessor system with nodes of a number smaller than the predetermined number being mounted on the backplane, a jumper board is mounted in a position where no node is mounted, and the wires in the backplane which are unconnected with nodes are connected by wires in the jumper board. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007233499(A) 申请公布日期 2007.09.13
申请号 JP20060051486 申请日期 2006.02.28
申请人 HITACHI LTD 发明人 SEKI TATSUICHIRO;FUJIWARA SHISEI
分类号 G06F15/173 主分类号 G06F15/173
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