发明名称 ARITHMETIC CIRCUIT AND ARITHMETIC METHOD
摘要 PROBLEM TO BE SOLVED: To provide an arithmetic circuit and an arithmetic method that can filter data arrayed in a two-dimensional space by a convolution operation in fewer cycles than before. SOLUTION: A convolution operation of data arrayed in a two-dimensional space comprises: in an initialization cycle, initializing multiply-add registers; and in each of the first to Nth consecutive cycles, holding data values from the first to Nth columns of an N row by N column area in the two-dimensional space in a data register, holding the operation result of the first multiplier-adder of a preprocessing circuit in the first multiply-add register of a postprocessing circuit, and holding the integral value of the operation result of the nth (n=2 to N) multiplier-adder of the preprocessing circuit and the value held in the (n-1)th multiply-add register of the postprocessing circuit in the preceding cycle, in the nth multiply-add register of the postprocessing circuit. A convolution operation result of the first operation target point situated at the center of the N row by N column area in the two-dimensional space is output from the Nth multiply-add register. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007233934(A) 申请公布日期 2007.09.13
申请号 JP20060057810 申请日期 2006.03.03
申请人 KAWASAKI MICROELECTRONICS KK 发明人 HASHIMOTO YORIYUKI;TEJU KHUBCHANDANI
分类号 G06T5/20;G06F17/10;G06T1/20 主分类号 G06T5/20
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