发明名称 VARIABLE GAIN AMPLIFIER CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, OUTPUT POWER ADJUSTMENT CIRCUIT, OUTPUT POWER ADJUSTMENT METHOD, TRANSMITTER, RECEIVER, AND TRANSCEIVER
摘要 PROBLEM TO BE SOLVED: To provide a variable gain amplifier without changes in noise performance by gain switching. SOLUTION: As for a source grounded NMOS transistor M1 101, its gate electrode is connected to a high frequency input terminal 112, and its source electrode is connected to ground potential. As for a gate grounded NMOS transistor M2 102, its gate electrode is connected to a VCC 109, and its source electrode is connected to a drain electrode of the M1 101. A drain electrode of the M2 102 is connected to a load 104, and to an output terminal 105 to take out output power. A drain electrode of the M1 101 is connected to a MOS capacitor element 106 from a node 116, and the other end of the MOS capacitor element 106 is connected to a drain electrode of a PMOS transistor M3 107. Each of a gate electrode and a source electrode of the M3 107 is connected to a control circuit 108 and the VCC 109. The M3 107 is appropriately biased so that its resistance value may change with an output voltage of the control circuit 108. The other end of the load 104 is connected to the VCC 109. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007235525(A) 申请公布日期 2007.09.13
申请号 JP20060054558 申请日期 2006.03.01
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANABE MITSURU
分类号 H03G3/10;H03F3/16;H04B1/04;H04B1/16;H04B1/40 主分类号 H03G3/10
代理机构 代理人
主权项
地址