ERROR DETECTION IN PHYSICAL INTERFACES FOR POINT-TO-POINT COMMUNICATIONS BETWEEN INTEGRATED CIRCUITS

摘要

Error detection in a physical interface for point-to-point communication between integrated circuits is provided to enable the physical interface to use an embedded asynchronous clock and an external synchronous clock by using a physical interface error detection bit extractor. An apparatus(101) for detecting an error in a physical interface(102), which facilitate a data communication between integrated circuits, includes a decoder and a physical interface error detection bit extractor. The decoder decodes a sub-set of an encoded data bit and provides decoded data bits. The physical interface error detection bit extractor is configured to detect a physical interface error detection bit from the decoded data bit. The physical interface error detection bit is used for determining whether the encoded data bit contains at least one error data bit. The apparatus includes an error detector, which is configured in the physical interface for detecting errors. The sub-set of the encoded data bit contains an embedded clock.