发明名称 TIMING ANALYTICAL SYSTEM, DEVICE, AND TIMING ANALYTICAL METHOD
摘要 <P>PROBLEM TO BE SOLVED: To timing-analyze a signal input into a device mounted on a circuit board, without executing probing on the circuit board. <P>SOLUTION: A memory part 2 of the device 10 inputs a data from a terminal 1 to be stored, when inputting an analytical request of input timing from a timing analyzer 20. The memory part 2 samples therein the input data, based on respective operation clock signals 3-1 to 3-15 generated by a clock signal generating part 3, and stores the sampled data in respective FITOs 2-1 to 2-15. A control part 8 reads out the stored data from the memory part 2, when the respective FITOs 2-1 to 2-15 are brought into a full condition, to be transferred to the timing analyzer 20 via an external interface 7. The timing analyzer 20 finds a set-up time and a hold time of the device 10, based on the transferred data. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007232641(A) 申请公布日期 2007.09.13
申请号 JP20060056591 申请日期 2006.03.02
申请人 NEC CORP 发明人 TSUCHIYA MASATO
分类号 G01R31/319;G06F11/22 主分类号 G01R31/319
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