| 摘要 |
Providing a transmission circuit, which can transfer data normally with high speed even toward a host controller and a device, which does not meet design requirements defined in the standard, a data-transfer control device and electronic equipment. A current source coupled between a first source VDD and a node ND 10 ; a first transistor SW 1 formed between the node ND 10 and a DP terminal; a second transistor SW 2 formed between the node ND 10 and a DM terminal; a first buffers outputting a first control signal HS_DPout 2 to the gate of the first transistor SW 1 ; and a second buffer outputting a second control signal HS_DMout 2 to the gate of the second transistor SW 2 ; are included. When any of the first control signal HS_DPout 2 and the second control signal HS_Dmout 2 is set active, other of the control signals is set non-active. Each of the buffers includes a first inverter INV 1 and a second inverter INV receiving an output from the first inverter INV 1 . A capacitance-arrangement circuit between the inverters INV 1 and INV 2 is installed.
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