Method using receive and transmit protocol aware logic modules for confirming checksum values stored in network packet

摘要

A network processor with modified transmit and receive paths in order to achieve higher bandwidth between a network interface to an attached user's circuit. The network processor includes a shared data buffer in which the network interface, processor, and user's interface all have access. The network processor also includes protocol aware logic that offloads much of the processor's tasks, and improves bandwidth. This abstract is provided as a tool for those searching for patents, and not as a limitation on the scope of the claims.