TRANSMITTER AND TRANSMITTER/RECEIVER

摘要

A clock control circuit (22) in a control circuit (21) provided in a transmitter (25) controls a gate circuit (12) according to an instruction of a microcomputer (32) and stops the output of a clock into a cable (115) for a first predetermined period. A read circuit in the microcomputer (32) accesses an EDID (31) held in an information holding circuit of a receiver (43) through the cable (115) and sets the first predetermined period according to the EDID (31). A resetting circuit (42) provided in the receiver (43) counts the stop state of the clock and resets at least either the receiver (43) or a television (114) when the clock continues the stop for a second predetermined period. By the reset operation, noise is prevented from being displayed on the television (114). As a result, even if signal switching causing a variation of the clock frequency is performed, noise occurring because of mislatch between the clock and the data can be reduced.