发明名称 STRIP FOR INTEGRATED CIRCUIT PACKAGES HAVING A MAXIMIZED USABLE AREA
摘要 A strip (40) on which a plurality of integrated circuit package outlines (42) may be fabricated 'within a plurality of process tools. The strip includes one or more fiducial, notches (44) and/or guide pin notches (46) formed in an outer edge of the strip. The one or more fiducial and/or guide pin notches allow a position of the strip to be identified within at least one process tool of the plurality of process tools. By forming the notches in the outer periphery of the strip, the usable area on the strip on which integrated circuit package outlines may be formed is increased. The strip may alternatively include conventional fiducial and/or guide pin holes (24, 26), with the molding compound applied at least partially around the holes on one or more sides of the strip. The strip may further alternatively include fiducial holes (92) filled with a translucent material that provides stability to the strip while allowing the strip to be used with an optical recognition sensor.
申请公布号 WO2007079122(A3) 申请公布日期 2007.09.07
申请号 WO2006US49379 申请日期 2006.12.27
申请人 SANDISK CORPORATION;TAKIAR, HEM;THAVARAJAH, MANICKAM;WANG, KEN JIAN, MING;LIAO, CHIH-CHIN;MCKENZIE, ANDRE;BHAGATH, SHRIKAR;CHEN, HAN-SHIAO;CHIU, CHIN- TIEN 发明人 TAKIAR, HEM;THAVARAJAH, MANICKAM;WANG, KEN JIAN, MING;LIAO, CHIH-CHIN;MCKENZIE, ANDRE;BHAGATH, SHRIKAR;CHEN, HAN-SHIAO;CHIU, CHIN- TIEN
分类号 H01L21/56;H01L23/495;H01L23/544 主分类号 H01L21/56
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