| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce conduction failure that occurs by an insulating layer residue between a via and a wiring pattern connected to it, by suppressing the insulating layer residue caused by insufficient laser machining, regardless of places where the via is formed. <P>SOLUTION: Laser machining is performed to form bottomed via-holes 27a, 27b, 27c, 27d, 45a and 45b, with varied laser machining condition, depending on places where a via is formed. In other words, with the area and thickness of lands 18a, 18b, 18c, 18d, 35d, and 35e where vias 37a, 37b, 37c, 37d, 54a and 54b are formed, or with the condition depending on whether it is directly above a filled via 37d or not. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
