| 摘要 |
A semiconductor device is configured that a high-withstand voltage semiconductor device (101) and logic circuits (201 and 301) are integrated on a single chip and that a high-withstand voltage high-potential island (402) including the high-potential-side logic circuit (301) is separated using multiple partition walls enclosing therearound. The semiconductor device is provided with a multi-trench separation region (405) having a level shift wire region (404) that is used to connect the high-potential-side logic circuit to the high-potential-side electrode of the high-withstand voltage semiconductor device. |
