发明名称 |
Display drive integrated circuit and method for generating system clock signal |
摘要 |
A display drive integrated circuit is for driving a display panel. The display drive integrated circuit includes a division rate output unit which outputs as a division rate corresponding to a quotient obtained by dividing by M a total number of clock cycles of a dot clock signal corresponding to a clock cycle of a horizontal synchronization signal, where M is a natural number, and a system clock generating unit which generates a system clock signal by dividing the dot clock signal using the division rate.
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申请公布号 |
US2007205971(A1) |
申请公布日期 |
2007.09.06 |
申请号 |
US20070712968 |
申请日期 |
2007.03.02 |
申请人 |
BAE JONG-KON;CHUNG KYU-YOUNG |
发明人 |
BAE JONG-KON;CHUNG KYU-YOUNG |
分类号 |
G09G3/36 |
主分类号 |
G09G3/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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