| 摘要 |
PROBLEM TO BE SOLVED: To provide a D/A converter with a simple circuit configuration that reduces glitch and improves a settling time. SOLUTION: The current cell type D/A converter using a timing generating circuit converts a digital code D into a voltage difference Vout between first and second analog voltages and includes a plurality of current cells 30-0 and a plurality of switch control signal generating circuits 50-0 that respectively generate switch control signals SEL1, SEL1b, SEL2, SEL2b given to the current cells 30-0. Each current cell 30-0 includes NMOS transistors 31 to 34 for switching and NMOS transistors 35, 36 for constant current sources. Adjusting the switching timings of the NMOS transistors 31 to 34 respectively subjected to ON/OFF control by the signals SEL1, SEL1b, SEL2, SEL2b eliminates a complete OFF period and reduces the glitch and improves the settling time of the D/A converter. COPYRIGHT: (C)2007,JPO&INPIT
|
