| 摘要 |
A phase change memory system includes M phase change memory cells, where M is an integer greater than or equal to one. A write module selectively writes at least one of the M phase change memory cells based on a write parameter. A read module selectively reads back a resistance value for the at least one of the M phase change memory cells. A control module communicates with the write module and the read module and triggers write/read cycles N times where N is an integer greater than one. The control module also adjusts a write parameter of one of the N write/read cycles based on at least one prior resistance value and a target resistance value.
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