发明名称 Phase change memory fabricated using self-aligned processing
摘要 A memory includes transistors in rows and columns providing an array, first conductive lines in columns across the array, and second conductive lines encapsulated by dielectric material in rows across the array. Each second conductive line is coupled to one side of the source-drain path of the transistors in each row. The memory includes phase change elements between the second conductive lines and contacting the first conductive lines and self-aligned to the first conductive lines. Each phase change element is coupled to the other side of the source-drain path of a transistor.
申请公布号 US2007206408(A1) 申请公布日期 2007.09.06
申请号 US20060366151 申请日期 2006.03.02
申请人 SCHWERIN ULRIKE G;HAPP THOMAS 发明人 SCHWERIN ULRIKE G.;HAPP THOMAS
分类号 G11C11/00 主分类号 G11C11/00
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