发明名称 SIMULATION SYSTEM, SIMULATION PROGRAM, AND SIMULATION METHOD
摘要 PROBLEM TO BE SOLVED: To calculate a percent defective for each fail mode using a distance measuring method. SOLUTION: The system comprises a first simulation executor 121 for calculating a shortest distance, until each wiring line forming the semiconductor memory device and a shortest distance for passage of each wiring line from coordinates on design layout data of a semiconductor memory device, each by a predetermined number; and also comprises a prediction analyzer 123 of each fail bit mode for calculating a yield for the semiconductor memory device from a criticality, and a probability of foreign matter having sizes of such shortest distances. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007227705(A) 申请公布日期 2007.09.06
申请号 JP20060047928 申请日期 2006.02.24
申请人 HITACHI HIGH-TECHNOLOGIES CORP 发明人 MATSUMOTO CHIZURU;HAMAMURA YUICHI
分类号 H01L21/82;H01L21/00;H01L21/02;H01L21/66 主分类号 H01L21/82
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