| 摘要 |
In a parallel pulse signal processing apparatus including a plurality of pulse output arithmetic elements ( 2 ), a plurality of connection elements ( 3 ) which parallelly connect predetermined arithmetic elements, and a gate circuit ( 5 ) which selectively passes pulse signals from the plurality of connection elements, the arithmetic element inputs a plurality of time series pulse signals, executes predetermined modulation processing on the basis of the plurality of time series pulse signals which are input, and outputs a pulse signal on the basis of a result of modulation processing, wherein the gate circuit selectively passes, of the signals from the plurality of connection elements, a finite number of pulse signals corresponding to predetermined upper output levels.
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