| 摘要 |
A method and apparatus for changing a clock frequency in a system ( 10 ) comprising a plurality of synchronous integrated circuit chips ( 12, 14, 16 ), and a circuit ( 20 ) for implementing the frequency change. The method includes: detecting a change in processing requirements in one of the plurality of synchronous integrated circuit chips; notifying the plurality of synchronous integrated circuit chips that a clock frequency change is to occur; achieving a quiescent bus state in each of the plurality of synchronous integrated circuit chips; notifying the plurality of synchronous integrated circuit chips that the clock frequency change can occur; and changing the clock frequency of the plurality of integrated circuit chips.
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